Field
Example embodiments relate to semiconductor devices, and methods of forming a semiconductor device, and/or more particularly, to semiconductor devices and methods of forming a semiconductor device by simultaneously patterning a cell array region and a peripheral circuit region.
Related Art
Recently, as a semiconductor device has a higher level of integration, it is becoming increasingly difficult to simultaneously pattern a bit line in a cell array region and a peripheral gate in a peripheral circuit region. A pitting phenomenon may occur in an active region of the peripheral circuit region due to a difference in an etching amount between respective films for forming the bit line and the peripheral gate. If a thickness of the film for forming the peripheral gate is increased to prevent the pitting phenomenon, then a parasitic capacitance may increase.